Introduction and Project Overviews
I am Jack Adiletta, a graduate of Worcester Polytechnic Institute (WPI) with a dual major in Electrical and Computer Engineering and Data Science, as well as a Master of Science in Electrical Engineering. I am currently an Intern at Intel Corporation and an Affiliate Researcher at WPI. My research spans computer engineering, artificial intelligence, and circuit design.
SmartBlocks
High Performance Computing (HPC) systems have known failure rates which impede full system performance. If a component has an average failure rate of 25 years, a system with 100,000 of them will fail every 2 hours. This problem poses a massive risk to the viability of advanced HPC systems for scientific discovery and Gigawatt scale AI training datacenters.
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SmartBlocks at Intel Corporation has previously shown the ability to of AI models to make insightful prefetcher recommendations based on telemetry (see below). Currently, I am applying AI models to predict HPC failures using telemetry. I have shown models have a strong ability to predict failures, and I am driving the AI model effort to productize SmartBlocks for HPC.​
Audio Anomaly Detection
(EfficientMic)
Professor Islam at WPI proposed using AI to detect audio anomalies. The goal of this project is to address proliferating power and bandwidth of IoT devices equipped with microphones by reducing the sample rate of microphones without inducing aliasing – distortion which occurs when the sample rate is below Nyquist. Together, we developed a methodology to synthesize both aliasing and non-aliasing audio across multiple frequencies, creating a corpus of environmental and context-specific sounds for audio anomaly detection. Using this corpus, I evaluated several machine learning algorithms and neural networks to identify the most effective model for distinguishing anomalous from normal audio. Collaborating with Professor Islam at WPI and Professor Wei at Augusta University, I published and presented a workshop paper on the dataset and technical paper on the model analysis during BuildSys 2025 at the Colorado School of Mines.
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Seeing the explosion of AI driving energy consumption and environmental pollution, I sought a solution for efficient AI matrix multiplication. I studied Fourier Series and analog circuits, eventually deriving a “Fourier Dot Product Circuit” which reduces matrix multiplication computation by an order of magnitude. I wrote a proposal for this circuit to win the Barry Goldwater Scholarship and published the proposal at the MIT undergraduate research and technology conference.
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For my senior project at WPI I used circuit simulations to show the entire FATE signal chain accurately computed dot products, publishing my findings at the Midwestern Circuits and Systems Conference. This summer I taped out the test chip currently under evaluation. After this effort, my university helped me file a patent on FATE.​
Additional Projects
For my freshman year science fair project in high school, I designed and 3D printed a robotic hand capable of performing American Sign Language. The system used 22 servo motors, 2 PWM controllers over I2C, and an Arduino connected to a touch screen to control the hand. I won a patent on the design at the Massachusetts Science Fair.
As my senior project in high school, I built a working scroll expander. A scroll expander uses two interlocking spirals to generate mechanical motion by expanding a high pressure, high temperature gas into a liquid, cooling the liquid. An Organic Rankine Cycle (ORCs) uses an expander device to convert gas to liquid. ORCs can use low grade heat from data centers to generate electricity, turning a cooling problem into usable energy.
I have broad experiences across computer vision & agent based simulation (IQP), video production (USS Constitution Documentary), and art (HMS Victory). These projects have shaped my communication skills, motor movements, and design abilities.